1. Field of the Invention
The invention relates to a delay circuit and to a method of generating a signal with a delay.
2. Description of the Related Art
In order to confirm the functionality of chips before they are shipped, electronic testers are employed to test the functionality of each chip. One of the goals is to measure or to determine timings that characterize the performance of the device under test. An example of such timings are delay type timings, i.e., the propagation delay from an input to an output of the device under test. Access times of memories rank for example among delay type timings.
The characterization of timings of electronic components, especially if they are embedded in an integrated circuit, must achieve high accuracy, since the delay times of such circuits are very small and are in the order of a nanosecond. It is convenient, and it is a standard approach to make the integrated circuit oscillate in order to measure a frequency instead of a delay.
In order to make the integrate circuit oscillate, an inverting path is provided, which connects the output terminal of the integrated circuit to its input terminal. The oscillation cycle time obtained from this arrangement equals the sum of the rising and the falling delay. However, the rising and the falling delay may be different. A perfect equality of the rising and the falling paths cannot be guaranteed over all operation conditions because the rising and the falling delay, for instance, may depend on the local variations of the transistors. Ultimately, only the sum of the rising and falling delays can be measured, but not only one of them. The measurement thus suffers from an intrinsic inaccuracy which cannot be compensated.